Publications
I have published more than 30 papers in venues including ASPLOS, DAC, SIGIR, and TCAD, with best paper awards and nominations from DATE, ISSRE, Euromicro DSD, and SELSE. See also my Google Scholar profile and CV. Everything below is also available as BibTeX.
Journal Articles 6
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TNSRE'23
Deep Learning Based Walking Tasks Classification in Older Adults using fNIRS
IEEE Transactions on Neural Systems and Rehabilitation Engineering, 2023
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TCAD'23
Testing and Enhancing Adversarial Robustness of Hyperdimensional Computing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
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ESL'22
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing
IEEE Embedded Systems Letters, 2022
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TCAD'21
DEVoT: Dynamic Delay Modeling of Functional Units under Voltage and Temperature Variations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021
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TCAD'20
LEVAX: An Input-aware Learning-based Error Model of Voltage-Scaled Functional Units
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
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ESL'19
WoMA: An Input-Based Learning Model to Predict Dynamic Workload of Embedded Applications
IEEE Embedded Systems Letters, 2019
Conference Papers 30
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A3@MICRO'26
PEWeaver: Enabling Agentic Hardware Optimization for Efficient Brain Implants using CHIA
First International Workshop on Agentic Approaches to Computer Architecture (co-located with MICRO 2026), Athens, Greece, 2026 (Spotlight paper)
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A3@MICRO'26
PortForge-TT: Enabling Agentic Cross-Platform Model Adaptation using CHIA
First International Workshop on Agentic Approaches to Computer Architecture (co-located with MICRO 2026), Athens, Greece, 2026 (Short paper)
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IJCNN'26
HDFlow: A Multi-layer Design and Evaluation Framework for Hyperdimensional Computing
2026 International Joint Conference on Neural Networks, Maastricht, Netherlands, 2026
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ACNS'26
Understanding the Robustness of BERT Models Against Hardware Errors: An Experimental Study
24th International Conference on Applied Cryptography and Network Security, Stony Brook, New York, USA, 2026
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ISCAS'26
MILEAM: Modeling Input-Aware Logic Errors of Approximate Multipliers Using Machine Learning
2026 IEEE International Symposium on Circuits and Systems, Shanghai, China, 2026
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WSDM'26
Stealing Black-box Hyperdimensional Computing Models Without Data
19th ACM International Conference on Web Search and Data Mining, Boise, Idaho, USA, 2026
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BioCAS'25
Proof-of-Useful-Work Blockchain for Trustworthy Biomedical Hyperdimensional Computing
21st IEEE Biomedical Circuits and Systems Conference, Abu Dhabi, United Arab Emirates, 2025
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ISSRE'25
Understanding Recommendation System Robustness Against Silent Data Corruption: An Empirical Study
36th IEEE International Symposium on Software Reliability Engineering, São Paulo, Brazil, 2025
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SIGIR'24
Memory-Efficient Deep Recommender Systems using Approximate Rotary Compositional Embedding
47th International ACM SIGIR Conference on Research and Development in Information Retrieval, Washington D.C., USA, 2024
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ASPLOS'24
Dr. DNA: Combating Silent Data Corruptions in Deep Learning using Distribution of Neuron Activations
ACM International Conference on Architectural Support for Programming Languages and Operating Systems, San Diego, California, USA, 2024
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ISQED'24
Hyperdimensional Computing vs. Neural Networks: Comparing Architecture and Learning Process
25th International Symposium on Quality Electronic Design, San Francisco, California, USA, 2024
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CVPRW-NAS'23
PerfHD: Efficient ViT Architecture Performance Ranking using Hyperdimensional Computing
Fourth Workshop on Neural Architecture Search, Third Lightweight NAS Challenge at the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, Vancouver, Canada, 2023
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IJCNN'23
On Hyperdimensional Computing-Based Federated Learning: A Case Study
2023 International Joint Conference on Neural Networks, Queensland, Australia, 2023
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ASP-DAC'23
Robust Hyperdimensional Computing Against Cyber Attacks and Hardware Errors: A Survey
28th Asia and South Pacific Design Automation Conference, Tokyo, Japan, 2023
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BIBM'22
MoleHD: Efficient Drug Discovery using Brain-Inspired Hyperdimensional Computing
IEEE International Conference on Bioinformatics and Biomedicine, Las Vegas, Nevada, USA, 2022
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CODES+ISSS'22
Brain-Inspired Hyperdimensional Computing for Ultra-Efficient Edge AI
International Conference on Hardware/Software Codesign and System Synthesis, Shanghai, China, 2022
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ISQED'22
AxBy-ViT: Reconfigurable Approximate Computation Bypass for Vision Transformers
23rd International Symposium on Quality Electronic Design, Virtual Conference, 2022
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DATE'22
Energy-Efficient Brain-Inspired Hyperdimensional Computing Using Voltage Scaling
Design, Automation and Test in Europe Conference, Antwerp, Belgium, 2022
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ISVLSI'21
HDXplore: Automated Differential Testing of Brain-Inspired Hyperdimensional Computing
IEEE Computer Society Annual Symposium on VLSI, Tampa, Florida, USA, 2021
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ISVLSI'21
SpamHD: Efficient Text Spam Detection Using Brain-Inspired Hyperdimensional Computing
IEEE Computer Society Annual Symposium on VLSI, Tampa, Florida, USA, 2021
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DAC'21
HDTest: Differential Fuzz Testing of Brain-Inspired Hyperdimensional Computing
58th ACM/EDAC/IEEE Design Automation Conference, San Francisco, California, USA, 2021
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DATE'21
Workload-Aware Approximate Computing Configuration
Design, Automation and Test in Europe Conference, Grenoble, France, 2021
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DSN'20
A Machine Learning-based Error Model of Voltage-Scaled Circuits
50th IEEE/IFIP International Conference on Dependable Systems and Networks, Valencia, Spain, 2020
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Euromicro DSD'20
AxBy: Approximate Computation Bypass for Data-Intensive Applications
Euromicro Conference on Digital System Design, Portorož, Slovenia, 2020
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GLSVLSI'20
AxR-NN: Approximate Computation Reuse for Energy-Efficient Convolutional Neural Networks
30th ACM Great Lakes Symposium on VLSI, Beijing, China, 2020
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DAC'20
TEVoT: Timing Error Modeling of Functional Units under Dynamic Voltage and Temperature Variations
57th ACM/EDAC/IEEE Design Automation Conference, San Francisco, California, USA, 2020
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SELSE'20
An Input-aware Learning-based Error Model of Voltage-Scaled Functional Units
16th IEEE Workshop on Silicon Errors in Logic – System Effects, Stanford, California, USA, 2020
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CODES+ISSS'19
Work-in-Progress: DeVos: A Learning-based Delay Model of Voltage-Scaled Circuits
International Conference on Hardware/Software Codesign and System Synthesis, New York, USA, 2019
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NANOARCH'19
Detecting and Bypassing Trivial Computations in Convolutional Neural Networks
IEEE/ACM International Symposium on Nanoscale Architectures, 2019
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ICESS'19
Energy Efficient GPU Applications Through Computation Skip
IEEE International Conference on Embedded Software and Systems, Las Vegas, Nevada, USA, 2019
Posters and Other 1
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NER'25
Real-Time Spike Sorting with SpikeDashboard
IEEE EMBS 12th Annual International Conference on Neural Engineering, San Diego, California, USA, 2025 (Poster)